Silicon technology has dominated modern semiconductor devices as the mainstream technology for industry. In order to sustain Moore's Law, transistor dimensions are shrinking to achieve ever increasing density. However, the inherent physical limitations of performances encountered by the silicon devices has motivated the development of silicon-on-insulator (SOI) or strained-silicon technologies for higher speed and lower power operation of silicon chips.
In addition, over the past several years, the inherent scaling limitations of electron devices have fueled the exploration of high carrier mobility semiconductors as a silicon (Si) replacement to further enhance the device performance. In particular, compound semiconductors heterogeneously integrated on Si substrates have been actively studied, combining the high mobility and low power consumption of III-V semiconductors and the well-established, low cost processing of the Si technology. This integration, however, presents significant challenges. As one approach, heteroepitaxial growth of complex multilayers on Si has been explored. Besides complexity, high defect densities and junction leakage currents present limitations in this approach.